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UR6515D Datasheet

3A DDR BUS TERMINATION REGULATOR


 
DESCRIPTION
 
The UR6515D is a linear regulator sourcing or sinking
continuous 2A or up to 3A transient peak current while regulating an
output voltage to within 40mV in the DDR SDRAM bus terminator
applications. It contains a high speed operational amplifier which
provides fast load transient response and only requires 10uF of
ceramic output capacitance.
The UR6515D output termination voltage tracks the reference
voltage applied at VREF pin. A resistor divider connected to VIN, GND
and VREF pins is used to force the reference voltage to VREF pin.
Additional features include current limiting protection and thermal shutdown protection.


 
FEATURES
 
*DDR1/ DDR2/DDR3 termination voltage applications
*Sink and Source Current
 -2A Continues Current
 -Peak 3A for DDR1&DDR2
 -Peak 2.5A for DDR3
*Low output voltage offset within 20mV
*Source and sink 3A peak current
*Adjustable output voltage by external resistors
*Integrated power MOS devices
*Suspend to RAM(STR) functionality
*Current Limiting Protection
*Thermal Shutdown Protection
*Cost-effective and easy to use
*Halogen Free
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