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UR5512 Datasheet

2A DDR BUS TERMINATION  REGULATOR
 

 
DESCRIPTION
 
 
The UTC UR5512 is a linear regulator which provides up to 2
Amp bi-directional driving and sinking capability for DDR SDRAM
bus terminator application. The output termination voltage tracks the
reference voltage applied at VREF pin. A resistor divider connected to
VIN, GND and VREF pins is used to force a reference voltage to VREF
pin. 
The UTC UR5512 contains a high-speed operational amplifier to
provide excellent response to line/load transient. An active-low
shutdown (VREF) pin provides Suspend to RAM (STR) functionality.
Additional features include current limiting protection, on-chip
thermal shut-down protection.  
 
 
FEATURES
 
 
* DDR-I and DDR-II termination voltage applications
* Driving and sinking current up to 2A
* Low output voltage offset (within 20mV@±2A)
* Adjustable output voltage by external resistors
* Suspend to RAM (STR) functionality
* Current limiting protection
* Thermal protection
* Cost-effective and easy to use
 
 
APPLICATION CIRCUIT





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