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CCVGA7C5 Datasheet

VGA PORT COMPANION CIRCUIT

 

 

 

 

DESCRIPTION

 

 

The UTC  CCVGA7C5 is an ESD solution for the VGA port

connector. This device integrates ESD protection for all signals,

Two non-inverting drivers provide buffering for the HSYNC

and VSYNC signals from the video controller IC. These buffers

accept TTL input levels and convert them to CMOS output levels

that swing between Ground and VCC These drivers have a

nominal 60Ω output impedance to match the characteristic

impedance of the HSYNC and VSYNC lines of the video cables

typically used. The inputs of  these drivers also have high

impedance pull−ups (50kΩ nom.) pulling up to the VAUX rail.  

In addition, the DDC_CLOCK and DDC_DATA channels have

1.8kΩ resistors pulling these inputs up to the main 5V (VCC) rail.

The upper ESD diodes for the R, G and B channels are connected to a separate supply rail (VRGB) to facilitate

interfacing to graphics controller ICs with low voltage supplies. The remaining channels are connected to the main 5

V rail (VCC). The lower diodes for the R, G and B channels are also connected to a dedicated ground pin (GNDA) to

minimize crosstalk due to common ground impedance.

ESD protection is implemented with current steering diodes designed to safely handle the high peak surge currents

associated with the IEC−1000−4−2 Level−4 ESD Protection Standard (±8kV contact discharge). When the channels

are subjected to an electrostatic discharge, the ESD current pulse is diverted via the protection diodes into the

positive supply rails or ground where they may be safely dissipated.

       

FEATURES

 

 

* 7 Channels of ESD Protection Designed to Meet IEC−1000−4−2 Level−4 ESD

Requirements (±8kV Contact Discharge)

* Three Independent Supply Pins (VCC, VRGB and VAUX) to Facilitate

Operation with Sub−Micron Graphics Controller ICs

* Very Low Loading Capacitance from ESD Protection Diodes at Less than 5pF Typical

 * TTL to CMOS Level−Translating Buffers for the HSYNC and VSYNC Lines

* High impedance Pull−Ups (50kΩ Nominal to VAUX) for HSYNC and VSYNC Inputs

* Pull−Up Resistors (1.8kΩ Nominal to VCC) for DDC_CLK and DDC_DATA Lines

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